Product Summary
The HEF4024BT is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (O0 to O6). The counter of the HEF4024BT advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of CP. Each counter stage is a static toggle flip-flop. The applications of the HEF4024BT include Frequency dividers, Time delay circuits.
Diagrams
Image | Part No | Mfg | Description | ![]() |
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![]() HEF4024BT,652 |
![]() NXP Semiconductors |
![]() Counter ICs 7-STAGE BIN COUNTER |
![]() Data Sheet |
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![]() HEF4024BT,653 |
![]() NXP Semiconductors |
![]() Counter ICs 7-STAGE BIN COUNTER |
![]() Data Sheet |
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![]() |
![]() HEF4024BTD-T |
![]() NXP Semiconductors |
![]() Counter ICs 7-STAGE BIN COUNTER |
![]() Data Sheet |
![]() Negotiable |
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![]() |
![]() HEF4024BTD |
![]() NXP Semiconductors |
![]() Counter ICs 7-STAGE BIN COUNTER |
![]() Data Sheet |
![]() Negotiable |
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